/*
 * Copyright (c) 2006-2021, RT-Thread Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 * 2021-10-11     RealThread   first version
 */

#ifndef __BOARD_H__
#define __BOARD_H__

#include <rtthread.h>
#include <rthw.h>
#include <stm32f4xx.h>

#ifdef __cplusplus
extern "C"
{
#endif

/*-------------------------- CHIP CONFIG BEGIN --------------------------*/

#define CHIP_FAMILY_STM32
#define CHIP_SERIES_STM32F4
#define CHIP_NAME_STM32F407VG

/*-------------------------- CHIP CONFIG END --------------------------*/

/*-------------------------- ROM/RAM CONFIG BEGIN --------------------------*/

#define ROM_START              ((uint32_t)0x08000000)
#define ROM_SIZE               (1024 * 1024)
#define ROM_END                ((uint32_t)(ROM_START + ROM_SIZE))

#define RAM_START              (0x20000000)
#define RAM_SIZE               (128 * 1024)
#define RAM_END                (RAM_START + RAM_SIZE)

#define RAM2_START              (0x10000000)
#define RAM2_SIZE               (64 * 1024)
#define RAM2_END                (RAM2_START + RAM2_SIZE)


void _Error_Handler(char *s, int num);

#ifndef Error_Handler
#define Error_Handler() _Error_Handler(__FILE__, __LINE__)
#endif

#define DMA_NOT_AVAILABLE ((DMA_INSTANCE_TYPE *)0xFFFFFFFFU)

#define __STM32_PORT(port)  GPIO##port##_BASE
#define GET_PIN(PORTx,PIN) (rt_base_t)((16 * ( ((rt_base_t)__STM32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x0400UL) )) + PIN)

#define STM32_FLASH_START_ADRESS       ROM_START
#define STM32_FLASH_SIZE               ROM_SIZE
#define STM32_FLASH_END_ADDRESS        ROM_END

#define STM32_SRAM1_SIZE               RAM_SIZE
#define STM32_SRAM1_START              RAM_START
#define STM32_SRAM1_END                RAM_END

#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
//#define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#define HEAP_BEGIN      (RAM2_START)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN      (__segment_end("CSTACK"))
#else
extern int __bss_end;
#define HEAP_BEGIN      ((void *)&__bss_end)
#endif

//#define HEAP_END                       STM32_SRAM1_END
#define HEAP_END                       (RAM2_END)



#define L1_ON_Pin GPIO_PIN_2
#define L1_ON_GPIO_Port GPIOE
#define L1_OFF_Pin GPIO_PIN_3
#define L1_OFF_GPIO_Port GPIOE
#define L2_ON_Pin GPIO_PIN_4
#define L2_ON_GPIO_Port GPIOE
#define L2_OFF_Pin GPIO_PIN_5
#define L2_OFF_GPIO_Port GPIOE
#define L3_ON_Pin GPIO_PIN_6
#define L3_ON_GPIO_Port GPIOE
#define L3_OFF_Pin GPIO_PIN_13
#define L3_OFF_GPIO_Port GPIOC
#define TEMP4_Pin GPIO_PIN_0
#define TEMP4_GPIO_Port GPIOC
#define TEMP1_Pin GPIO_PIN_2
#define TEMP1_GPIO_Port GPIOC
#define TEMP2_Pin GPIO_PIN_3
#define TEMP2_GPIO_Port GPIOC
#define TEMP3_Pin GPIO_PIN_0
#define TEMP3_GPIO_Port GPIOA
#define PL_ADC_Pin GPIO_PIN_3
#define PL_ADC_GPIO_Port GPIOA
#define CP_FB_Pin GPIO_PIN_4
#define CP_FB_GPIO_Port GPIOA
#define SCOPE_12V_Pin GPIO_PIN_5
#define SCOPE_12V_GPIO_Port GPIOA
#define SCOPE_5V_Pin GPIO_PIN_6
#define SCOPE_5V_GPIO_Port GPIOA
#define SCOPE_15V_Pin GPIO_PIN_0
#define SCOPE_15V_GPIO_Port GPIOB
#define SCOPE_M15V_Pin GPIO_PIN_1
#define SCOPE_M15V_GPIO_Port GPIOB
#define RN_INTN_Pin GPIO_PIN_7
#define RN_INTN_GPIO_Port GPIOE
#define RN_CF1_Pin GPIO_PIN_8
#define RN_CF1_GPIO_Port GPIOE
#define RN_CSN_Pin GPIO_PIN_9
#define RN_CSN_GPIO_Port GPIOE
#define BUZZER_Pin GPIO_PIN_10
#define BUZZER_GPIO_Port GPIOE
#define PL_DC_Pin GPIO_PIN_11
#define PL_DC_GPIO_Port GPIOE
#define PL_AC_Pin GPIO_PIN_12
#define PL_AC_GPIO_Port GPIOE
#define WIFI_EN_Pin GPIO_PIN_14
#define WIFI_EN_GPIO_Port GPIOE
#define LED1_Pin GPIO_PIN_15
#define LED1_GPIO_Port GPIOE
#define FLASH_CSN_Pin GPIO_PIN_11
#define FLASH_CSN_GPIO_Port GPIOD
#define BT_EMERGENCY_Pin GPIO_PIN_15
#define BT_EMERGENCY_GPIO_Port GPIOD
#define ETH_CTRL_Pin GPIO_PIN_8
#define ETH_CTRL_GPIO_Port GPIOA
#define ETH_RST_Pin GPIO_PIN_10
#define ETH_RST_GPIO_Port GPIOA
#define N_ON_Pin GPIO_PIN_10
#define N_ON_GPIO_Port GPIOC
#define N_OFF_Pin GPIO_PIN_11
#define N_OFF_GPIO_Port GPIOC
#define G4G_DTR_Pin GPIO_PIN_3
#define G4G_DTR_GPIO_Port GPIOD
#define G4G_DISA_Pin GPIO_PIN_4
#define G4G_DISA_GPIO_Port GPIOD
#define G4G_RST_Pin GPIO_PIN_7
#define G4G_RST_GPIO_Port GPIOD
#define EE_WP_Pin GPIO_PIN_0
#define EE_WP_GPIO_Port GPIOE
#define RS485_DIR_Pin GPIO_PIN_1
#define RS485_DIR_GPIO_Port GPIOE

extern UART_HandleTypeDef huart1;
extern UART_HandleTypeDef huart2;
extern UART_HandleTypeDef huart3;
extern UART_HandleTypeDef huart5;
extern UART_HandleTypeDef huart6;

#define CONSOLE_USART_Handle    huart1
#define ESP32_USART_Handle      huart3
#define RFID_USART_Handle       huart5
#define GPRS_USART_Handle       huart2
#define LCD_USART_Handle        huart6


void rt_hw_debug_led(uint32_t operation);
void rt_hw_us_delay(rt_uint32_t us);


#ifdef __cplusplus
}
#endif

#endif /* __BOARD_H__ */
